OSNet-AIN
2%Tiny pedestrian re-ID. The default for cross-camera tracking on dashcam-class silicon.
Cross-chip benchmark matrix
Every supported chip, in matched-pair runs from the Fo’c’sle HIL lab. Sortable by any column — click a header. Cells where the chip can’t run this model show Not supported.
| Chip platform | Quant | Latency p50(ms) | Latency p95(ms) | Throughput | Acc. retention(%) | Power(W) | Memory(MB) | Tested by |
|---|---|---|---|---|---|---|---|---|
A Ambarella CV72 32 TOPS · SoC | INT8 | 7.47 | 8.95 | 134 FPS | 98.8 | 5.7 | 3 | Publisher |
π Raspberry Pi 5 + Hailo HAT 26 TOPS · HAT | INT8 | 8.70 | 11.5 | 115 FPS | 97.2 | 7.2 | 3 | Publisher |
H Hailo-8 26 TOPS · M.2 | INT8 | 8.88 | 11.8 | 113 FPS | 98.5 | 2.3 | 3 | Fo’c’sle HIL |
A Ambarella CV5 16 TOPS · SoC | INT8 | 16.5 | 20.2 | 61 FPS | 97.8 | 3.7 | 3 | Fo’c’sle HIL |
R Rockchip RK3588 6 TOPS · SoC | INT8 | 22.0 | 28.0 | 45 FPS | 98.2 | 9.0 | 3 | Fo’c’sle HIL |
G Google Coral Edge TPU 4 TOPS · USB | INT8 | 26.6 | 32.6 | 38 FPS | 98.5 | 1.8 | 3 | Publisher |
H Hailo-10H 40 TOPS · M.2 | Not supported | |||||||
Q Qualcomm QCS6490 12 TOPS · SoC | Not supported | |||||||
Q Qualcomm QCS8550 48 TOPS · SoC | Not supported | |||||||
Q Snapdragon 8 Gen 3 NPU 45 TOPS · SoC | Not supported | |||||||
N NVIDIA Jetson Orin Nano 40 TOPS · SoM | Not supported | |||||||
N NVIDIA Jetson AGX Orin 275 TOPS · Module | Not supported | |||||||
N NVIDIA Jetson Thor 2070 TOPS · Module | Not supported | |||||||
M MediaTek Genio 700 4 TOPS · SoC | Not supported | |||||||
I Intel Movidius Myriad X 4 TOPS · SoC | Not supported | |||||||
A AMD Versal AI Edge VE2302 22 TOPS · SoC | Not supported | |||||||
Apple Neural Engine (M4) 38 TOPS · SoC | Not supported | |||||||
HIL conditions
All numbers measured on Fo’c’sle HIL rigs in Tel Aviv (primary), Munich (secondary), and Pittsburgh (robotics). Single-stream, batch-1, real preprocessing, real downstream consumer. p50/p95 are over 10,000-frame steady-state windows after a 30-second warm-up. Power draw is package power, not wall power. Memory footprint is the resident model + activations footprint at peak — not on-disk.
Submitted publisher numbers are accepted only if they reproduce within ±8% of an HIL-lab matched run on the same chip in the same input mode. Otherwise they live separately under the Discussion tab.