YOLO-World-Edge
14%Open-vocabulary detector. Text-prompt the classes at runtime; no retraining.
Cross-chip benchmark matrix
Every supported chip, in matched-pair runs from the Fo’c’sle HIL lab. Sortable by any column — click a header. Cells where the chip can’t run this model show Not supported.
| Chip platform | Quant | Latency p50(ms) | Latency p95(ms) | Throughput | Acc. retention(%) | Power(W) | Memory(MB) | Tested by |
|---|---|---|---|---|---|---|---|---|
N NVIDIA Jetson Thor 2070 TOPS · Module | FP16 | 6.60 | 8.15 | 151 FPS | 99.9 | 100.2 | 74 | Publisher |
N NVIDIA Jetson AGX Orin 275 TOPS · Module | FP16 | 11.4 | 14.3 | 88 FPS | 99.6 | 52.3 | 74 | Fo’c’sle HIL |
Q Qualcomm QCS8550 48 TOPS · SoC | INT8 | 17.1 | 21.5 | 58 FPS | 98.5 | 12.4 | 37 | Publisher |
N NVIDIA Jetson Orin Nano 40 TOPS · SoM | INT8 | 22.6 | 27.7 | 44 FPS | 98.5 | 13.1 | 37 | Publisher |
π Raspberry Pi 5 + Hailo HAT 26 TOPS · HAT | INT8 | 35.0 | 41.9 | 29 FPS | 98.6 | 7.3 | 37 | Community |
R Rockchip RK3588 6 TOPS · SoC | INT8 | 69.0 | 88.6 | 14 FPS | 97.6 | 8.2 | 37 | Community |
H Hailo-8 26 TOPS · M.2 | Not supported | |||||||
H Hailo-10H 40 TOPS · M.2 | Not supported | |||||||
Q Qualcomm QCS6490 12 TOPS · SoC | Not supported | |||||||
Q Snapdragon 8 Gen 3 NPU 45 TOPS · SoC | Not supported | |||||||
A Ambarella CV5 16 TOPS · SoC | Not supported | |||||||
A Ambarella CV72 32 TOPS · SoC | Not supported | |||||||
M MediaTek Genio 700 4 TOPS · SoC | Not supported | |||||||
G Google Coral Edge TPU 4 TOPS · USB | Not supported | |||||||
I Intel Movidius Myriad X 4 TOPS · SoC | Not supported | |||||||
A AMD Versal AI Edge VE2302 22 TOPS · SoC | Not supported | |||||||
Apple Neural Engine (M4) 38 TOPS · SoC | Not supported | |||||||
HIL conditions
All numbers measured on Fo’c’sle HIL rigs in Tel Aviv (primary), Munich (secondary), and Pittsburgh (robotics). Single-stream, batch-1, real preprocessing, real downstream consumer. p50/p95 are over 10,000-frame steady-state windows after a 30-second warm-up. Power draw is package power, not wall power. Memory footprint is the resident model + activations footprint at peak — not on-disk.
Submitted publisher numbers are accepted only if they reproduce within ±8% of an HIL-lab matched run on the same chip in the same input mode. Otherwise they live separately under the Discussion tab.